Aspects disclosed herein relate to the field of computer processors. More specifically, aspects disclosed herein relate to aggregating functionality of computer machine instructions to generate additional computer machine instructions and including the additional computer machine instructions in an instruction set architecture (ISA).
When defining a new computing machine, instructions for inclusion in an ISA of the computing machine are defined. Operations supported by (to be performed by) the computing machine are important to the process of defining an ISA for the computing machine, and the operations supported by the computing machine potentially become instructions of the computing machine.
An instruction set of an already existing processor ISA may be considered as a possible starting point (e.g., with additional instructions to be added) or as a complete instruction set of the computing machine. When starting with an already existing instruction set, it may be difficult to determine which instructions of the instruction set are useful for performing operations of the new computing machine. While many instruction sets already exist, each instruction set is designed for a particular processor architecture, and there is no guarantee that instruction “granules” (e.g., of an existing instruction set) that are good for an existing computing machine are also good for the operations of a new computing machine. For example, an Intel® X86 (e.g., 80486, Pentium®) instruction set may not be good for a newly designed 8-bit digital signal processor (DSP).
Therefore, techniques for creating instruction sets for new computing machines are desirable.